This invention relates to the field of data communications receivers and more particularly to receiver circuits capable of receiving and decoding a complete data transmission of virtually any length without the benefit of a synchronizing preamble being transmitted before the data.
In digital radio frequency paging systems, data is sent to a particular personal paging receiver by transmitting the paging receiver's unique address code followed by the message. Personal paging receivers are normally equipped with battery saver circuits which activate the receiver circuits only for brief periodic intervals of time, the shorter the activation period, the less the battery drain. To keep this activation period at a minimum, asynchronous circuits are normally used because they require no synchronization period prior to receiving the address.
Asynchronous circuits have problems, however, which become more acute when the length of the message following the address is increased. First, a typical asynchronous circuit samples the incoming address at four times per bit and stores these samples in a sample register. After each new sample, the content of the sample register is compared to the correct address which is stored in the paging receiver's memory. If the content of the sample register is essentially the same as the correct address, then it is assumed that the following message is directed to that particular paging receiver But, since sampling only occurs at four times per bit, the initial phase alignment between the message and the receiver's asynchronous clock is only known within one-fourth of a bit. Furthermore, slight differences between the frequencies of the transmitting and receiving clocks cause further misalignment which eventually results in the receiver either dropping a received bit, or adding an extra unwanted bit. The longer the message is, the higher the probability that the transmitting and receiving clocks will eventually become misaligned.
To overcome these problems, highly accurate clock circuits can be utilized in both the transmitter and receiver asynchronous circuits, however, these are usually prohibitive because of cost and initial frequency alignment problems. Operating the transmitter and receiver in different temperature environments can also cause their respective clock frequencies to drift apart. Synchronous circuits can also be utilized in the personal paging receiver, however, such circuits need an additional synchronizing preamble immediately before the data, requiring that the receiver circuits be active during the preamble which results in increased battery drain.